A phase-locked loop (PLL) system typically consists of a phase comparator, a charge pump circuit, a RC loop filter and a voltage-controlled oscillator (VCO) as shown in FIG. 1a. The PLL is a negative feedback system which operates in such a way that the phase and frequency of the VCO output (Q) always follows the phase and frequency of the input signal (IN). The input signal and the VCO output are normally square waveforms. A charge pump circuit is the circuit portion of the phase-locked loop system which charges and discharges the loop filter based on the phase difference between the reference clock and the output clock. Because the output of a charge pump circuit directly drives the voltage-controlled oscillator (VCO), the PLL circuit's output jitter is very sensitive to the performance of a charge pump circuit. Conventionally, a singled-ended charge pump is used in a PLL circuit. However, in order to obtain better performance, a differential circuit architecture is adopted to reduce the common-mode noise, especially for high-speed and low-jitter applications. One well-known problem associated with a differential-mode charge pump circuit is that both DC outputs of the charge pump circuit are floating. A prior art solution to the floating DC output problem is to use common-mode feedback (CMFB) circuitry to control the output DC voltages. The function of CMFB circuitry is to sense the output voltages from the differential charge pump and keep the output common-mode voltage at a constant level. However, since the CMFB circuitry is dependent on the output voltages of the differential charge pump circuit, the CMFB circuitry always moves up and down according to the variations in the charge pump's output voltages. Further, the bandwidth of CMFB circuitry is comparable to the operating frequency range of the PLL circuit, and thus has shortcoming and limitations in high-frequencies applications greater than 400 MHz. The bandwidth dependency limitation results in the CMFB circuitry being unstable and reduces the PLL circuit's performance.
Accordingly, a need is seen to exist for circuitry that controls a differential charge pump in a manner such that the common-mode output voltage is independent of the control circuitry, and thus avoids the instability problems associated with CMFB circuitry.
It is therefore a primary object of the present invention to provide a control circuit for controlling the common-mode output voltage of a differential charge pump circuit. The control circuitry is configured in a non-common-mode feedback manner to avoid instability problems associated with CMFB circuitry.
A related object of the present invention is to provide a control circuit for use in phase-locked loop and delayed-lock loop circuit applications which control the common-mode output voltage of the differential charge pump circuit by using control circuitry configured in a non-common-mode feedback manner to avoid instability problems associated with CMFB circuitry.